Joint NHR@ZIB - INTEL oneAPI Workshop, March 2-3, 2021
(all times in CET = UTC+1)
Day 1 (Tuesday; March 2nd, 2021)
TOPIC | Presenter | ||
|---|---|---|---|
| 09:00 | 09:10 | Edmund Preiss (Intel), Thomas Steinke (ZIB) | |
| 09:10 | 09:40 | oneAPI – Introduction to a new Development Environment - Concept and oneAPI Standardization initiative - Intel’s Tools Implementation – Intel oneAPI Toolkits and libs - Transition from Intel Parallel Studio XE to Intel oneAPI toolkits | Edmund Preiss (Intel) |
| 09:40 | 10:10 | Introduction to the DevCloud - Purpose: Demoing, testing and porting applications - Hardware and Software offerings - How to onboard & how to get an DevCloud account | Michael Steyer (Intel) |
| 10:10 | 10:15 | Bio Break | |
| 10:15 | 12:15 | Direct programming with oneAPI Compilers – with Demos - Intro to DPC++ heterogenous programming model and SYCL 2020 - Fortran and offloading with OpenMP5.0 - DPC++ features and examples o “Hello World” Example o Device Selection o Compilation and Execution Flow o Execution Model o Memory Model; Buffers, Unified Shared Memory (USM) o Kernel Model | Igor Vorobtsov (Intel) |
| 12:15 | 13:15 | Lunch Break | |
| 13:15 | 14:15 | Compatibility tool for porting purposes with demo - Migration Cuda based GPU Applications to oneAPI (DPC++) | Igor Vorobtsov (Intel) |
| 14:15 | 15:00 | Intel oneAPI libraries (oneMKL, oneDAL, …) - with demos - Performance optimized libraries for AI, numerical simulations and other purposes | Gennady Fedorov (Intel) |
| 15:00 | 15:05 | Bio Break | |
| 15:05 | 15:30 | - Questions and Answers - Wrap up | Intel / ZIB |
Day 2 (Wednesday; March 3rd, 2021)
| TOPIC | Presenter | ||
|---|---|---|---|
| 09:00 | 09:10 | Welcome and Introduction to Day 2 | Edmund Preiss (Intel), Thomas Steinke (ZIB) |
| 09:10 | 10:10 | A oneAPI Case Study: easyWave - A Tsunami Simulations Application | Steffen Christgau (ZIB) (Marius Knaust, ZIB) |
| 10:10 | 10:50 | Intel OpenMP – with Demos - Parallelizing heterogenous applications with Intel OpenMP and OpenMP offloading | Michael Steyer (Intel) |
| 10:50 | 11:00 | Bio Break | |
| 11:00 | 11:45 | Intel HW (public) roadmap/XPU and architecture specifics - Server CPUs - Client CPUs (i.e., Tigerlake; iCore with integrated graphics) - Intel hardware accelerators GPUs (DG1, SG1, ATS) and Intel FPGAs | Jean-Laurent Philippe (Intel) |
| 11:45 | 12:15 | A oneAPI Case Study: Ginkgo – a sparse linear algebra library for OneAPI Hardware Experience and potential of using oneAPI for the Ginkgo sparse linear algebra library - Porting of numerical linear algebra kernels from Cuda to DPC++ - Pitfalls and solutions in the OneAPI Compatibility Tool - Performance of Ginkgo’s DPC++ backend on Intel GPU - Live demo running Ginkgo in the Intel DevCloud | Hartwig Anzt (KIT) (Y. Tsai, T. Cojean, KIT) |
| 12:15 | 13:15 | Lunch Break | |
| 13:15 | 14:30 | Application profiling for heterogenous hardware - Demos - Profile DPC++ and GPU Workload VTune Profiler and VTune Offload - Share experiences/key findings with Gromacs related porting and optimization efforts | Heinrich Bockhorst (Intel) |
| 14:30 | 14:35 | Bio Break | |
| 14:35 | 15:35 | Application profiling for heterogenous hardware - Demos | Klaus-Dieter Oertel (Intel) |
| 15:35 | 16:00 | - Questions and Answers - Wrap up | Intel / ZIB |